EECS 31 (4.0 units) – Session I
Digital representation of information. Specification, analysis, design and optimization or combinational and sequential logic, register-transfer components and register-transfer systems with datapaths and controllers. Introduction to high-level and algorithmic state-machines and custom processors. (Design units: 2). Prerequisite: ICS 31 or EECS 10 or EECS 12 or MAE 10 or ICS 32A Online Course. Access your online course in MyEEE the week prior to the Session start date.